feat(inspur): source-PRI timezone timeline, PPIN serial, NVMe fault storage status

Event ingestion now uses the source syslog PRI and an explicit-offset
timezone timeline instead of assuming host-local time. CPU PPIN is
exported as the source-backed CPU serial, and an active NVMe fault SEL
event promotes the matching drive's storage status.

See ADL-056, ADL-057.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>

internal/parser/vendors/inspur/cpu_serial_test.go

@@ -0,0 +1,22 @@
+package inspur
+
+import "testing"
+
+func TestParseAssetJSONUsesPPINAsSourceBackedCPUSerial(t *testing.T) {
+	content := []byte(`{
+  "CpuInfo": [
+    {"ProcessorName":"Intel Xeon", "PPIN":"D46E5D6B1D3E40E1"},
+    {"ProcessorName":"Intel Xeon", "PPIN":"D44F8D6B9155EE0E"}
+  ]
+}`)
+	hw, err := ParseAssetJSON(content, nil, nil)
+	if err != nil {
+		t.Fatalf("parse asset: %v", err)
+	}
+	if len(hw.CPUs) != 2 {
+		t.Fatalf("expected 2 CPUs, got %d", len(hw.CPUs))
+	}
+	if hw.CPUs[0].SerialNumber != "D46E5D6B1D3E40E1" || hw.CPUs[1].SerialNumber != "D44F8D6B9155EE0E" {
+		t.Fatalf("unexpected CPU serial mapping: %+v", hw.CPUs)
+	}
+}